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instruction_encoding [2023/11/15 15:26] – [Jump instructions] pulkomandy | instruction_encoding [2024/05/12 09:44] – [Summary] pulkomandy | ||
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^Contents|Opcode0|Operand A|Opcode1|6-bit Immediate | ^Contents|Opcode0|Operand A|Opcode1|6-bit Immediate | ||
+ | ===== Summary ===== | ||
+ | |||
+ | ^Opcode 0\1 ^ 0 ^ 1 ^ 2 ^ 3 ^ 4 ^ 5 ^ 6 ^ 7 ^ | ||
+ | ^Addressing mode|[BP+Imm6]|# | ||
+ | ^ | ||
+ | ^ | ||
+ | ^ | ||
+ | ^ | ||
+ | ^ | ||
+ | ^ | ||
+ | ^ | ||
+ | ^ | ||
+ | ^ | ||
+ | ^ | ||
+ | ^ | ||
+ | ^ | ||
+ | ^ | ||
+ | ^ | ||
+ | ^ | ||
+ | ^ | ||
+ | |||
+ | * Instructions in bold: uses the addressing mode listed on the first line | ||
+ | * Instructions in italics: only if operand A (destination register) is PC | ||
===== Special instructions ===== | ===== Special instructions ===== | ||
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^%% D: | ^%% D: | ||
^%% Rs %%| ALU op| Op. A | 4 | 0 | Rs | | ^%% Rs %%| ALU op| Op. A | 4 | 0 | Rs | | ||
- | ^%% # | + | ^%% # |
- | ^%% From [Addr16] %%| ALU op| Op. A | 4 | 2 | Rs | + | ^%% From [Addr16] %%| ALU op| Op. A | 4 | 2 | Unused |
- | ^%% To [Addr16] | + | ^%% To [Addr16] |
^%% Rs ASR shift %%| ALU op| Op. A | 4 | 4 + (shift - 1) | Rs | | ^%% Rs ASR shift %%| ALU op| Op. A | 4 | 4 + (shift - 1) | Rs | | ||
^%% Rs LSL shift %%| ALU op| Op. A | 5 | shift - 1 | Rs | | ^%% Rs LSL shift %%| ALU op| Op. A | 5 | shift - 1 | Rs | | ||
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The ST operation uses the second source operand (Rs, address, ...) as the target, and operand A (always a register) as the source. | The ST operation uses the second source operand (Rs, address, ...) as the target, and operand A (always a register) as the source. | ||
+ | |||
+ | Other operations can use both forms, so the "From [Addr16]" | ||
+ | |||
+ | '' | ||
+ | |||
+ | and the "To [Addr16]" | ||
+ | |||
+ | '' | ||
+ | |||
+ | (so in this case the register encoded in OPA is used as a source, not a destination). | ||
+ | |||
+ | The LD and ST operations with the 16-bit addressing mode ignore the value of Rs, they use only Ra and the 16-bit value. |