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instruction_encoding [2023/11/15 16:26] – [Jump instructions] pulkomandyinstruction_encoding [2023/12/31 16:49] (current) – [ALU instructions] pulkomandy
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 ^%% D:[++Rs]      %%| ALU op|  Op. A  | 3       | 7                | Rs      | ^%% D:[++Rs]      %%| ALU op|  Op. A  | 3       | 7                | Rs      |
 ^%% Rs            %%| ALU op|  Op. A  | 4       | 0                | Rs      | ^%% Rs            %%| ALU op|  Op. A  | 4       | 0                | Rs      |
-^%% #Imm16        %%| ALU op|  Op. A  | 4       | 1                | Rs      | |16-bit immediate in next word| +^%% #Imm16        %%| ALU op|  Op. A  | 4       | 1                | Unused  | |16-bit immediate in next word| 
-^%% From [Addr16] %%| ALU op|  Op. A  | 4       | 2                | Rs      | |16-bit address in next word| +^%% From [Addr16] %%| ALU op|  Op. A  | 4       | 2                | Unused  | |16-bit address in next word| 
-^%% To [Addr16]   %%| ALU op|  Op. A  | 4       | 3                | Rs      | |16-bit address in next word|+^%% To [Addr16]   %%| ALU op|  Op. A  | 4       | 3                | Unused  | |16-bit address in next word|
 ^%% Rs ASR shift  %%| ALU op|  Op. A  | 4       | 4 + (shift - 1)  | Rs      | ^%% Rs ASR shift  %%| ALU op|  Op. A  | 4       | 4 + (shift - 1)  | Rs      |
 ^%% Rs LSL shift  %%| ALU op|  Op. A  | 5       | shift - 1        | Rs      | ^%% Rs LSL shift  %%| ALU op|  Op. A  | 5       | shift - 1        | Rs      |
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 The ST operation uses the second source operand (Rs, address, ...) as the target, and operand A (always a register) as the source. The ST operation uses the second source operand (Rs, address, ...) as the target, and operand A (always a register) as the source.
 +
 +Other operations can use both forms, so the "From [Addr16]" would be something like this:
 +
 +''R3 = R2 + [Addr16]''
 +
 +and the "To [Addr16]" corresponds to:
 +
 +''[Addr16] = R2 + R3''
 +
 +(so in this case the register encoded in OPA is used as a source, not a destination).
 +
 +The LD and ST operations with the 16-bit addressing mode ignore the value of Rs, they use only Ra and the 16-bit value.
instruction_encoding.1700062015.txt.gz · Last modified: 2023/11/15 16:26 by pulkomandy
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