Differences

This shows you the differences between two versions of the page.

Link to this comparison view

Both sides previous revisionPrevious revision
Next revision
Previous revision
instruction_encoding [2023/12/18 12:44] – [ALU instructions] pulkomandyinstruction_encoding [2023/12/31 16:49] (current) – [ALU instructions] pulkomandy
Line 114: Line 114:
 ^%% D:[++Rs]      %%| ALU op|  Op. A  | 3       | 7                | Rs      | ^%% D:[++Rs]      %%| ALU op|  Op. A  | 3       | 7                | Rs      |
 ^%% Rs            %%| ALU op|  Op. A  | 4       | 0                | Rs      | ^%% Rs            %%| ALU op|  Op. A  | 4       | 0                | Rs      |
-^%% #Imm16        %%| ALU op|  Op. A  | 4       | 1                | Rs      | |16-bit immediate in next word| +^%% #Imm16        %%| ALU op|  Op. A  | 4       | 1                | Unused  | |16-bit immediate in next word| 
-^%% From [Addr16] %%| ALU op|  Op. A  | 4       | 2                | Rs      | |16-bit address in next word| +^%% From [Addr16] %%| ALU op|  Op. A  | 4       | 2                | Unused  | |16-bit address in next word| 
-^%% To [Addr16]   %%| ALU op|  Op. A  | 4       | 3                | Rs      | |16-bit address in next word|+^%% To [Addr16]   %%| ALU op|  Op. A  | 4       | 3                | Unused  | |16-bit address in next word|
 ^%% Rs ASR shift  %%| ALU op|  Op. A  | 4       | 4 + (shift - 1)  | Rs      | ^%% Rs ASR shift  %%| ALU op|  Op. A  | 4       | 4 + (shift - 1)  | Rs      |
 ^%% Rs LSL shift  %%| ALU op|  Op. A  | 5       | shift - 1        | Rs      | ^%% Rs LSL shift  %%| ALU op|  Op. A  | 5       | shift - 1        | Rs      |
Line 142: Line 142:
 ''R3 = R2 + [Addr16]'' ''R3 = R2 + [Addr16]''
  
-and the "To [Addr16"]'' corresponds to:+and the "To [Addr16]corresponds to:
  
-''[Addr16] = R2 + R3'' (so in this case the register encoded in OPA is used as a source, not a destination).+''[Addr16] = R2 + R3'' 
 + 
 +(so in this case the register encoded in OPA is used as a source, not a destination).
  
 The LD and ST operations with the 16-bit addressing mode ignore the value of Rs, they use only Ra and the 16-bit value. The LD and ST operations with the 16-bit addressing mode ignore the value of Rs, they use only Ra and the 16-bit value.
instruction_encoding.1702899866.txt.gz · Last modified: 2023/12/18 12:44 by pulkomandy
CC Attribution 4.0 International
Driven by DokuWiki Recent changes RSS feed Valid CSS Valid XHTML 1.0