This is an old revision of the document!


Currently documented at https://github.com/vsmile-dev/vsmile-hardware-docs/blob/master/ppu.md

The PPU is an earlier version of the one used in GeneralPlus current GPL951 series of chips. That newer series has a publicly available code sample including register descriptions and other info.

From https://www.generalplus.com/3LVlangLN5SVprot_noSNproduct : AppNote showing how to use the PPU

The application note contains a PDF showing the register layout (Document/GPL951xx PPU driver_user.pdf) and C files with a complete library to use it (PPU/ directory). However, it uses some of the new features in later generations and is not compatible with the V.Smile.

The PPU provides two background layers (which can use either tiled or bitmap modes), on top of which sprites can also be displayed.

Basic info about tiles

The PPU works with tiles. The idea of tiles is to have small square or rectangular images (8×8 up to 64×64 pixels) and use them to compose a larger image. The advantage of this is that some tiles can be reused in multiple places, which provides a simple compression method. Also, a tile can be quickly replaced by another, without copying a lot of bytes around in RAM, to animate things.

There are two layers of tiles that can be put on top of each other. Each layer can have a different color depth, color palette, tile size, blend setting, layer depth, and also vertical and horizontal mirroring. They can also be scrolled vertically and horizontally.

Each layer has a tile map. This is a chunk of memory that is filled with index of tiles, going left to right and top to bottom. The index is multiplied by the tile size (depending on the width, height, and bits per pixel) and added to the segment pointer of that layer to find the address of the bitmap data for that tile. Then, that bitmap is displayed. The index of 0 has a special meaning as it will draw an entirely transparent tile.

In addition, each layer supports an optional attribute map mode that allows setting the blend setting, palette and mirroring of each tile individually. The attribute map is a memory chunk organized in the same manner as the tile map, except that each word stores data for two tiles instead of one. Each layer also supports an optional scrolling mode where in addition to the normal layer scroll, each line has additional individual horizontal scrolls. The array controlling the scroll of each line is shared between the two layers.

It's also possible to use a bitmap mode, but this needs a lot of memory. Since the V.Smile doesn't have much RAM, typically, only fixed bitmaps read directly from ROM will be used in this case.

Register map

Address Contents
2810-2815 Layer 1
2816-281B Layer 2
281C Vertical scale (8 bits)
281D Vertical movement
2820 Layer 1 segment pointer
2821 Layer 2 segment pointer
2822 Sprite segment pointer
282A Blending level (2 bits)
2830 Fade level (8 bits)
2836 Vertical IRQ (9 bits)
2837 Horizontal IRQ (9 bits)
283C Hue and Saturation adjust (8 bits each)
283D LFP (bit 2), Interlace (bit 0)
283E Lightpen vertical position (9 bits)
283F Lightpen horizontal position (9 bits)
2842 Sprites enable
2854 LCD control (bits 4 and 5: framerate, bit 3: CkvSel, bit 2, resolution, bits 1 and 0: color mode)
2862 IRQ control (bit 2: DMA, bit 1: VDO, bit 0: blanking)
2863 IRQ status (same layout)
2870 DMA source address
2871 DMA target address (9 bits)
2872 DMA transfer length (9 bits)
2900-29FF Text horizontal control
2A00-2AFF Horizontal scale
2B00-2BFF Color palette (15 bit RGB and bit15 indicates transparent colors)
2C00-2C03 Sprite 0
2C04-2C07 Sprite 1
2FFC-2FFF Sprite 255

Layer 1 and 2 registers

Address Function
2810/2816 X position
2811/2817 Y position
2812/2818 Attributes
2813/2819 Control
2814/281A Tilemap address
2815/281B Attribute map address
2820/2821 Tile data segment

Each layer can be positionned at any X and Y coordinate on screen.

The following global attributes are available:

  • Bit depth (bits 0 and 1) can be 2, 4, 6, or 8 bits per pixel
  • Bit 2: mirror the tiles horizontally
  • Bit 3: mirror the tiles vertically
  • Bits 4 and 5: width of tiles (8, 16, 32 or 64 pixels)
  • Bits 6 and 7: height of tiles
  • Bits 8 to 11: palette bank to use
  • Bits 12 and 13: define the layer depth (wether it is under or over sprites and the other layer)
  • Bits 14 and 15: unused (in later PPU generations it sets the layer size)

The control register can do the following:

  • Bit 0: use bitmap mode instead of tile mode
  • Bit 1: If set, the attribute register is used. If clear, the attributes are fetched from RAM (like the tilemap) and can be different for each tile
  • Bit 2: Wallpaper effect (only first character/line attribute is effective)
  • Bit 3: enable the layer
  • Bit 4: enable horizontal movement
  • Bit 5: enable horizontal compression
  • Bit 6: enable vertical compression
  • Bit 7: use direct colors instead of palette (each 16-bit word is a RGB15 value)
  • Bit 8: enable blending

The tilemap and attribute addresses are 13 bit value, so the tilemap has to be in RAM.

The tiles themselves, however, are usually stored in flash. The data segment register defines the segment where to find tiles. To compute where the data for a tile is, use: data segment * 0x40 + tile id * tile size in words

Sprite registers

0 Sprite char select
1 Sprite X position
2 Sprite Y position
3 Sprite attributes

Each sprite has an X and Y position and an attribute register that works the same as for the layers. The attribute register has an extra bit (bit 14) to enable blending. The blending level is global for all sprites and there are only 4 possible values.

Unlike for layers, there is no tile and attribute map: a sprite is made of one single tile, which ID is stored directly in the corresponding register for the sprite.

ppu.1629928005.txt.gz · Last modified: 2021/08/25 23:46 by simer
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