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instruction_encoding [2021/04/25 16:20] – [ALU instructions] simer | instruction_encoding [2023/12/31 16:49] (current) – [ALU instructions] pulkomandy | ||
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Jump instructions are identified by Operand A = 7 (makes sense, because they change the PC which is register 7) | Jump instructions are identified by Operand A = 7 (makes sense, because they change the PC which is register 7) | ||
- | ^Instruction | + | ^Instruction |
- | ^ JB, JNAE, JCC | 0 | | + | ^ JB, JNAE, JCC | 0 | |
- | ^ JAE, JNB, JCS | 1 | | + | ^ JAE, JNB, JCS | 1 | |
- | ^ JGE, JNL, JSC | 2 | | + | ^ JGE, JNL, JSC | 2 | |
- | ^ JL, JNGE, JSS | 3 | | + | ^ JL, JNGE, JSS | 3 | |
- | ^ JNE, JNZ | 4 | | + | ^ JNE, JNZ | 4 | |
- | ^ JE, JZ | 5 | | + | ^ JE, JZ | 5 | |
- | ^ JPL | + | ^ JPL |
- | ^ JMI | + | ^ JMI |
- | ^ JBE, JNA | 8 | | + | ^ JBE, JNA | 8 | |
- | ^ JA, JNBE | 9 | | + | ^ JA, JNBE | 9 | |
- | ^ JLE, JNG | A | | + | ^ JLE, JNG | A | |
- | ^ JG, JNLE | B | | + | ^ JG, JNLE | B | |
- | ^ JVC | + | ^ JVC |
- | ^ JVS | + | ^ JVS |
- | ^ JMP | + | ^ JMP |
| | | | ||
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^%% D: | ^%% D: | ||
^%% Rs %%| ALU op| Op. A | 4 | 0 | Rs | | ^%% Rs %%| ALU op| Op. A | 4 | 0 | Rs | | ||
- | ^%% # | + | ^%% # |
- | ^%% From [Addr16] %%| ALU op| Op. A | 4 | 2 | Rs | + | ^%% From [Addr16] %%| ALU op| Op. A | 4 | 2 | Unused |
- | ^%% To [Addr16] | + | ^%% To [Addr16] |
^%% Rs ASR shift %%| ALU op| Op. A | 4 | 4 + (shift - 1) | Rs | | ^%% Rs ASR shift %%| ALU op| Op. A | 4 | 4 + (shift - 1) | Rs | | ||
^%% Rs LSL shift %%| ALU op| Op. A | 5 | shift - 1 | Rs | | ^%% Rs LSL shift %%| ALU op| Op. A | 5 | shift - 1 | Rs | | ||
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The ST operation uses the second source operand (Rs, address, ...) as the target, and operand A (always a register) as the source. | The ST operation uses the second source operand (Rs, address, ...) as the target, and operand A (always a register) as the source. | ||
+ | |||
+ | Other operations can use both forms, so the "From [Addr16]" | ||
+ | |||
+ | '' | ||
+ | |||
+ | and the "To [Addr16]" | ||
+ | |||
+ | '' | ||
+ | |||
+ | (so in this case the register encoded in OPA is used as a source, not a destination). | ||
+ | |||
+ | The LD and ST operations with the 16-bit addressing mode ignore the value of Rs, they use only Ra and the 16-bit value. |