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| spu [2025/02/07 20:27] – Beat interrupts simer | spu [2025/02/08 17:48] (current) – [Beat interrupts] simer | ||
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| The SPU provides a beat interrupt which can be used to drive sequenced music tracks. | The SPU provides a beat interrupt which can be used to drive sequenced music tracks. | ||
| - | Beat interrupts are enabled by writing to the enable bit (bit 15) of the beat count register (0x3405). | + | Beat interrupts are enabled by writing to the enable bit (bit 15) of the beat count register (0x3405). |
| - | When enabled, the beat count will decrease at a regular rate governed by the beat base count register. When the beat count reaches zero, the beat interrupt will trigger. The interrupt is acknowledged by writing 1 to the status bit (bit 14). The beat count is not automatically reset, instead the program should fill the beat count field with a new value. | + | When enabled, the beat count will decrease at a regular rate governed by the beat base count register. When the beat count reaches zero, the beat interrupt will trigger |
| The beat base count register (0x3404) defines the rate in which the beat count is automatically decreased as '' | The beat base count register (0x3404) defines the rate in which the beat count is automatically decreased as '' | ||
