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io [2022/11/11 14:18]
– [Configuration] pulkomandy
io [2022/11/11 15:33] (current)
– [ROM and cartridge] pulkomandy
Line 45: Line 45:
   * IOB2: Set to 0 to enable internal ROM   * IOB2: Set to 0 to enable internal ROM
 +Note: these can be used with the "External Memory Control" register, in that case they are controlled by the CPU core automatically depending on the address being accessed.
 +For example in external address mode 2 or 3 (4 ROMs mode):
 +^Pin   ^Address range^
 +|IOB0  |100000-1FFFFF|
 +|IOB1  |200000-2FFFFF|
 +|IOB2  |300000-3FFFFF|
 +In external address mode 0: ROMCSB is the only one used for the whole range (note: ROMCSB is not wired to anything, so in this area no ROM will be enabled)
 +In external mode 1 (2 ROMs mode):
 +^Pin   ^Address range^
 +|IOB1  |200000-3FFFFF|
 +Additionally, the end of the address space can also receive RAM (in the cartridge), this is configured separately and different RAM sizes are possible.
 ===== Power control ===== ===== Power control =====
io.txt · Last modified: 2022/11/11 15:33 by pulkomandy
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